SPI is a bus like I2C, but it's only really usable with a single master. Each slave has four pins - two data lines, a clock, and a slave select.

(Are there any ARM chips with at least 4 independent SPI ports, without having to do bit-banging?)

Some SPI slaves needs a seperate enable line from the master, making it costly on pins compared to I2C -- 16 slaves would require 20 pins on the master.

(Is this really a kind of SPI, or is there a better name for it?) Other SPI slaves (such as the ADS1271 and the 74HC595) can be connected in a "daisy chain" -- any number of slaves requires 4 pins on the master. In a daisy chain, the master data out is connected to the first slave data in, the first slave data out is connected to the second slave data in ... the last slave data in, and the last slave data out is connected to the master data in. The whole chain acts as a large shift register. When the master pulls the SS low, the slaves simultaneously dump their data into their part of the large shift register. Then the master clocks out all the data from the slaves, while simultaneously clocking in new commands for the slaves. When the master puts the SS high, each slaves acts on the command in its section of the large shift register. JTAG uses this kind of daisy-chained SPI.

SPI tends to support higher data rates than I2C. So a typical design might have an I2C interface for the pushbuttons and LEDs and configuration EEPROM, but an SPI interface to a mass storage device and an MP3 decoder.

The SD Card and MMC Card systems use an SPI bus.

http://www.epanorama.net/links/serialbus.html#spi has information about SPI. http://www.mct.net/faq/spi.html With this article, the possibilities of serial communication with peripheral devices via SPI (Serial Peripheral Interface) will be discussed.

Devices

• The STA013 MP3 decoder chip can be fed data from an SPI interface
• Some of the AT91SAM microcontrollers have up to 2 independent SPI interfaces